During Productronica 2011 at the New Munich Trade Fair Centre, ASTER Technologies the leading supplier in Board-Level Testability and Test Coverage analysis tools, will be demonstrating the Design-To-Test features that have been added to the TestWay and TestWay Express, DfT and Test Coverage analysis tools.ASTER have now added the capability to speed up the post layout test development process by generating the test files for assembly, X-Ray, optical inspection, flying-probe, in-circuit and boundary-scan machines such as MYDATA; Agilent i3070, Agilent 5DX; Teradyne GR228x, TestStation, Z1800 and Spectrum; Aeroflex; Takaya APT8000/APT9000;
Acculogic; Asset; Goepel Electronics, JTAG Technologies and XJTAG.In a recent Airbus experiment the ability to automatically export the ICT design-to-test files such as the Agilent board, board_xy, and the models for hybrid, analog and digital devices including the disabling features, reduced the test program development time by up to 30%.In addition ASTER have embedded a test optimization algorithm within the Takaya flying probe test exporter that provides advanced test balancing and boundary-scan optimization.
This can be either driven by the theoretical boundary-scan test coverage, or the real test coverage imported from ACCULOGIC, ASSET, GOEPEL Electronics, JTAG Technologies and XJTAG testers. Additional exporters are currently under development to cover the test and inspection machines in the complete assembly line.
